The present invention relates generally to an analog to digital converter, and more particularly to an analog to digital converter based on a successive approximation algorithm (SAA).
In general, an analog to digital converter (ADC) is a circuit for converting an analog input signal to a digital signal. A flash-type ADC is a particular type of ADC featuring a high processing speed and therefore widely used for processing video signals.
A conventional ADC includes multiple-reference voltages generator 10, a comparing unit 12, and an encoder 14 as shown in FIG. 1.
The multiple-reference voltages generator 10 includes a plurality of resistors connected in series outputting a plurality of reference voltages by dividing a reference voltage Vref and a ground voltage VSS. The number of the resistors is determined according to the number of the reference voltages to be outputted, and at least 2N resistors are provided and 2N−1 reference voltages are outputted supposing that the ADC is a circuit outputting N-bit data (where N is a natural number).
The comparing unit 12 is equipped with 2N−1 comparators, which is the same as the number of reference voltages. Each comparator outputs a high or low signal by comparing an input signal Vin to a reference voltage.
The encoder 14 combines and encodes the outputs of the comparing unit 12 into digital values to be outputted.
The conventional ADC, as shown in FIG. 1, requires the number of comparators to be equal to number of reference voltages. The conventional ADC, as shown in FIG. 1, is capable of converting data at a fast rate, however the conventional ADC has very high current consumption and requires a wider area, which is proportional to the number of comparators, for the purpose of layout.
Due to these limitations, that is the high current consumption and large layout size, the conventional ADC, as shown in FIG. 1, is not suitable for the requirements of a mobile machine.